Thunderbolt 3 doesn't use those USB 2.0 wires; that was one of the big changes in USB4/TB4 to use them. Once you're in Thunderbolt 3 mode, all USB ports are provided by PCIe xHCI controllers by the TB3 device.
In actuality, the mode where the XDR display consumes 38gbps of uncompressed display bandwidth is an Apple-only mode requiring special Titan Ridge firmware that aggregates 6 lanes of HBR3. Contrary to the article, Alpine Ridge does not support 6k, which specifically is why the iMac Pro doesn't support 6k output. It requiring special firmware is also why this mode only works when directly connected to the Mac.
But yeah, it's annoying that everyone throws bandwidth numbers around without mentioning or even thinking if it's link rate or data rate.
I don't think Thunderbolt ever uses anything other than 4 lanes per DP connection if the GPU doesn't limit the lane count, because Thunderbolt deserializes DP packets, transmits them over the link and serializes them back on the other end, so it can't negotiate the lane count on the host side.
Thunderbolt 3 uses the four high speed lanes of the USB C connector. The USB 2.0 separate wires are present and are definitely used.
Yes, it's USB4 which added USB packets to the bus, TB3 only had PCIe and DP.
That's rather interesting there, what do you mean by aggregating? Thunderbolt could always carry 40gbps worth of DisplayPort packets and afaik it was not lane bound.
I mean, if you have access to the actual Thunderbolt spec saying otherwise then so be it. Personally, I sincerely doubt that the PCIe packets containing USB 2.0 data are specially routed over the USB 2.0 wires like you say since that runs counter to literally everything public about how Thunderbolt 3 works.
Maybe the spec itself doesn't define a maximum bandwidth allocation for DisplayPort packets, but the DisplayPort stream has to come from somewhere and be output somewhere else, and with one single exception, the actual implementations support two HBR2 streams or one HBR3 stream, with each stream obviously being individually capped to 4 lanes at the physical DP interface.
(AFAIK the special mode combines one 4-lane HBR3 stream with a second 2-lane HBR3 stream)
What...? No. There are no PCIe packets, it's completely separate. The USB 2.0 wires are not part of the Thunderbolt specification, it's part of the USB C connector specification. USB C is a physical connector with four high speed lanes, a separate pair of wires for USB 2.0, one for negotiating things and one "extra". Here is a TB3 dock with a USB 2.0 port: https://www.bhphotovideo.com/c/product/1512891-REG/belkin_f4...
This is the same reason you see some adapters using DisplayPort alternate mode have a USB 2.0 port only -- in this case, it's DP packets which occupy the four high speed lanes much like Thunderbolt above.
My understanding is that your average thunderbolt 3 equipment, when running in thunderbolt mode, did not directly pass through any USB traffic. Instead a dock with USB 2 or 3 ports had to contain a USB controller that connects back over PCIe. This was very common, lots of docks have them.
"Titan Ridge, however, would disconnect the USB 2.0 and USB 3.1 hubs immediately upon entry into TBT3 mode."
"USB4 (and Thunderbolt 4) don't do this for the classic USB 1.1/2.0 wires of D+ and D-. When a hub is operating in advanced USB4 mode, classic USB 1.1/2.0 signals still ride through a normal USB 2.0 hub"
"disabling PCIe also means disabling the way that all Thunderbolt 3 docks get to USB 1.1/2.0/3.2 devices at all"
In actuality, the mode where the XDR display consumes 38gbps of uncompressed display bandwidth is an Apple-only mode requiring special Titan Ridge firmware that aggregates 6 lanes of HBR3. Contrary to the article, Alpine Ridge does not support 6k, which specifically is why the iMac Pro doesn't support 6k output. It requiring special firmware is also why this mode only works when directly connected to the Mac.
But yeah, it's annoying that everyone throws bandwidth numbers around without mentioning or even thinking if it's link rate or data rate.