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wfunction
on July 20, 2014
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Introduction to Coreboot, an open source BIOS
Mind blown indeed. But don't these need special CPU instructions? Which x86 instructions do this? (Or is this done through a special hardware pin on the CPU?)
simcop2387
on July 20, 2014
[–]
Apparently it's done through controlling the MTRR registers on the CPU:
http://rere.qmqm.pl/~mirq/cache_as_ram_lb_09142006.pdf
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