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> #3. More open tools and specifications would allow programmers to start optimising and rethinking the FPGA compilation process, potentially leading to radical reductions in run times.

Including using an FPGA to accelerate that process -- probably possible since from what I know there is a lot of parallelism involved in synthesising logic.



> there is a lot of parallelism involved in synthesising logic.

But not the kind of parallelism that's fast on an FPGA.




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