Goodness, this is cool! Do you have experience with this FPGA/toolchain? How long does it typically take to render something from Verilog to bitstream? E.g. a hello world adder v/s a risc v cpu?

I do! I’ve played around with it with this exact setup. It really depends on your processor, these toolchains really love a good mix of both high frequency and multi core. A hello world adder is less than a minute, a riscv core much much longer. A 16 core zen4/zen5 can compile the riscv core and linux in roughly 20 minutes? Compared to about an hour on a M1 Max macbook pro - It’s been awhile so I could be misremembering.

thanks, that's good to know!

I can vouch for ECP5, it is a good choice in terms of size and open source toolchain support (excellent, although non-aided by lattice).