Yes, multiple times, in both American companies and in Chinese startups.
> Most operations (filtering, joining, indexing) are purely integer workloads with large working sets that are likely to stall the processor while waiting for data.
That is not a justification for having only one FPU. Let's use logic here, it is not that hard.
> That's exactly the scenario that was targeted with that processor design, many threads per core such that the cores are always busy even if some of the threads are stalled on memory accesses.
Again, that doesn't justify the stupidity of having just one FPU.
> It wasn't meant for single threaded workloads or HPC workloads, and afaik wasn't marketed for those segments.
I am now totally confused. You are defending the stupid T1 design which only has 1 FPU for its entire processor capable of running 32 threads in parallel, yet your argument is that such design is meant for multi-threaded workloads? I thought you need multiple FPUs to truly parallelize those multi-threaded workloads.
As jfim wrote (emphasis mine): "It was designed for the heavily parallel web workloads of the 2000s". At this time, this mostly meant integer workload. For todays's workloads even in this particular domain, having only one FPU for 32 threads is likely a bad idea, but at that time, this was a perfectly acceptable compromise for this kind of application. These were simply different times.
Yes, multiple times, in both American companies and in Chinese startups.
> Most operations (filtering, joining, indexing) are purely integer workloads with large working sets that are likely to stall the processor while waiting for data.
That is not a justification for having only one FPU. Let's use logic here, it is not that hard.
> That's exactly the scenario that was targeted with that processor design, many threads per core such that the cores are always busy even if some of the threads are stalled on memory accesses.
Again, that doesn't justify the stupidity of having just one FPU.
> It wasn't meant for single threaded workloads or HPC workloads, and afaik wasn't marketed for those segments.
I am now totally confused. You are defending the stupid T1 design which only has 1 FPU for its entire processor capable of running 32 threads in parallel, yet your argument is that such design is meant for multi-threaded workloads? I thought you need multiple FPUs to truly parallelize those multi-threaded workloads.