The Intel 8087 math coprocessor (1980) had too much microcode to fit into a standard ROM. It was implemented with a special ROM that stored two bits per transistor by using four different transistor sizes, almost doubling the density. Each value read from the ROM was thresholded to generate two output bits. This technique was also used in the iAPX 432's I/O processor chip.
NB-ROM-shenanigans are very traditional. The Tektronix 7000 readout (1969) managed to encode the stroke of an entire letter with just a few transistors. Here's the letter 3, encoded in 24 transistors: https://w140.com/tekwiki/images/e/e0/7000-readout-chargen-ci... This uses multi-emitter transistors to encode discrete current ratios (which are then interpolated across groups by smoothly ramping base currents between points, turning them into strokes), all connections done in the metal layer, so the silicon was the same for all ROM chips.
Same concept for reading - threshold regions indicate multiple bit values, but different for storage.
The 8087 used physically different transistor sizes[0] to read a voltage level that "stored" two bits inside four threshold regions. MLC/TLC/QLC/PLC use a single transistor but charge the gate to a different "analog" voltage that is between 2^n threshold regions - MLC has four (two bits), TLC has eight (three bits), QLC has 16 (four bits), and PLC has 32 (five bits).
