C910 has claimed 6.11/GHz SPECint2006, which at 1.85 GHz would make it 11.3.
You might not have the optimal settings.
It's also possible that the TH1520 doesn't have enough cache for SPECint.
In my own testing building riscv-gnu-toolchain on both I've found the SG2042 EVB with -j4 to be 1.55x the speed of the LicheePi4A. The SG2042 had the same C910 cores but a lot of L2 and L3 cache (and 64 cores, but I limited it to 4 of them for this test).
Scaling your 7.64 SPECint by 1.55x gives 11.8, so that's the same ballpark.
My VisionFive 2 does the same build 1.13x faster than the LiCheePi4A. That's using the same src&build trees on the same Samsung 2 TB USB3 external SSD.
The TH1520 has 64k L1 icache and 64k L1 dcache, plus 1 MB shared L2 cache.
The JH7110 in the VF2 has only 32k each L1 icache and dcache, but 2 MB shared L2 cache.
The SG2042 has 64k each L1 icache and dcache, 1 MB shared L2 cache per 4 cores (so far, the same as TH1520), 4 MB of local L3 cache per 4 core cluster, and 60 MB of L3 cache on the other 15 clusters that is also usable at about 2/3 the bandwidth (twice faster than RAM).
The Pi4 also seems to have only 1 MB L2 cache. Which makes me wonder ... was your code compiled 32 bit or 64 bit?
More likely they are using compilers that support their private extensions. I call BS on all vendor supplied benchmark results, that includes SiFive, as they don't really represent results users are likely to get without extensive tuning.
ADD: it's unlikely the amount of cache and more likely their quite long L2 hit latency which is a lot longer (in wall-time) than, say a Cortex-A72.
L2 size, L2 speed, whatever, they're both down to the goodness of the SoC design, not the ISA.
For that matter, the 20% difference you found could be compiler maturity. And it's small enough that it's hard to notice without sitting two machines doing the same thing next to each other, or using a stopwatch.
But yeah, could well be that TH1520 has a duff L2 cache design in some way.
Much more shocking to me than the Pi 4 beating the TH1520 by 20% is the in-order dual-issue, 20% slower clock speed JH7110 beating it by 13% on a GNU toolchain build.
You might not have the optimal settings.
It's also possible that the TH1520 doesn't have enough cache for SPECint.
In my own testing building riscv-gnu-toolchain on both I've found the SG2042 EVB with -j4 to be 1.55x the speed of the LicheePi4A. The SG2042 had the same C910 cores but a lot of L2 and L3 cache (and 64 cores, but I limited it to 4 of them for this test).
Scaling your 7.64 SPECint by 1.55x gives 11.8, so that's the same ballpark.
My VisionFive 2 does the same build 1.13x faster than the LiCheePi4A. That's using the same src&build trees on the same Samsung 2 TB USB3 external SSD.
The TH1520 has 64k L1 icache and 64k L1 dcache, plus 1 MB shared L2 cache.
The JH7110 in the VF2 has only 32k each L1 icache and dcache, but 2 MB shared L2 cache.
The SG2042 has 64k each L1 icache and dcache, 1 MB shared L2 cache per 4 cores (so far, the same as TH1520), 4 MB of local L3 cache per 4 core cluster, and 60 MB of L3 cache on the other 15 clusters that is also usable at about 2/3 the bandwidth (twice faster than RAM).
The Pi4 also seems to have only 1 MB L2 cache. Which makes me wonder ... was your code compiled 32 bit or 64 bit?