Stacking transistors increases density per square inch if it can be done on a single wafer of silicon, because its "per square inch of fab wafer silicon"
I view it as if you cut 1 square inch of a motherboard. That the every 2 years you’d expect to see roughly double the number of transistors in that cut out piece.
Scaling vertically would “technically” still meet the above.
I don’t think that’s what they mean by per square inch. They mean in a plane, not a volume. If you add a third dimension the law stays the same, because a volume is two planes and the density law applies to each independently. That’s why node sizes are a single value not a two dimensional value. A 3nm node is 3nm feature sizes, regardless of dimensionality.
> The complexity for minimum component costs has increased at a rate of roughly a factor of two per year. Certainly over the short term this rate can be expected to continue, if not to increase. Over the longer term, the rate of increase is a bit more uncertain, although there is no reason to believe it will not remain nearly constant for at least 10 years.
If he was talking about the area of a single transistor, there would be more concise ways to put it.
