To be crystal clear: my statement pertained to 32-bit MIPS CPU's and MIPS CPU's predating the R8000. They were very slow. 32-bit MIPS CPU's did not have multiply and division instructions, they had branch delay slots that are unwieldy for a compiler to generate the efficient code for, plus other stuff. Early 32-bit MIPS implementations did not even have a hardware TLB (it was implemented in the kernel), which made the context switching between kernel and user spaces slow.
R8000 (MIPS IV) was fast and later MIPS64 CPU's were very fast, especially on floating point operations, and consistently outperformed competing 64-bit RISC and x86 CPU's because the MIPS64 was an ISA redesign that addressed and fixed many of the problems of the 32-bit version of the ISA.
That is a very frivolous interpretation of what I said.
I was comparing: a) 32-bit MIPS CPU's with 64-bit MIPS CPU's, b) 32-bit SPARC v8 and 64-bit SPARC v9 (UltraSPARC) CPU's, and c) performance of 32-bit RISC CPU's comparatively to each other. 32-bit MIPS and SPARC v8 CPU's were slow, with MIPS32 being one of the slowest across the entire board.
I was not comparing MIPS64 to UltraSPARC II or III because MIPS64 implementations (especially R10k and R12k) were exceptionally highly performant, especially in numeric computations that UltraSPARC CPU's were not known for at the time. UltraSPARC II/III systems were renowned for very high, sustained overall system throughput, and nor for high CPU computational performance.
At the time, if one wanted a number crunching beast, they had a choice of either MIPS64, or PA-RISC 2.0, or POWER CPU's. Mostly either MIPS64 or PA-RISC 2.0 (I am not including DEC Alpha – another early performance contender – because it perished too prematurely in the acrid belly of Compaq/HP acquisition shenanigans and did not get a chance to advance past 21264).
SPEC would like to dissagree with you.