Sounds like a decent approach. On the current AM4 setup, the chipset had an x8 link allocated (at least in dmi), but only x4 was ever hooked up. Based on information here, too bad they weren't able to build on that and avoid the daisy chain setup altogether (x4 direct to each "southbridge").
I thought the length of board traces were part of the reasoning against that idea.
If you could have your CPU placed symmetrically in the middle of the board with slots, ports etc both above and below so they don't get too long traces then maybe? But that would go against the ATX spec.
I also wonder how often communication happens from one device direct to another without touching CPU? Is that a thing? DMA has been a thing for many years but with the memory controller on the CPU communications would still have to get there.
