By buying ARM the owner gets control over an architecture that many describe as "the future of computing". That's much more valuable than whatever money ARM makes.
Let’s be real. ARM got a chance because it excelled in a very specific use case: low power. Unless RISC-V differentiates itself in a significant way, it won’t replace ARM.
> RISC-V seems to me to have two major opportunities.
> - Where a free ISA allows innovation and experimentation in a way that Arm would not permit.
I would say that the two major innovations of RISC-V are:
- Composability.
- Extensibility (that also fosters experimentation).
Each ARM version X.Y comes with a license and with a condition: «thou shalt taketh either everything or nothing»; RISC-V has neither a license nor strings attached and is «thou may useth only what thou needeth». Anyone who does not need SIMD or the vector processing can do away with them in the silicon. It saves the die size[0] and costs. This is the composability aspect.
Extensions planned out and/or reserved for future use (e.g. 128-bit extension of RISC-V), and the ability to add custom instructions to experiment with (and possible contribute to the RISC-V forum). This is the extensibility aspect.
Other existing open ISA (MIPS, POWER SuperH J-2? – unsure on the status of the last one) do not offer composability and extensibility capabilities, which leads me to reason that it is the major innovation(s) of RISC-V.
[0] Albeit it is somewhat fraught with the danger of creating a highly fragmented RISC-V CPU market where the software has to accommodate every possible permutation of RISC-V extensions and inject an emulation layer for extensions missing in the die.
Google maintains two parallel Android platforms right now, so the idea of porting everything over to a third is not _too_ far off. There's a lot of effort in getting JIT up-to-speed on RISC, but most everything else is a recompile away.
And JIT can come in later. But definition it's making runtime decisions on code generation, so being supported by optional extensions isn't the end of the world.
You seem to be knowledgeable about this, so I wanted to ask - is ARM more efficient (perf/watt) than Risk-V? (I know there are lots of factors like frequencies/voltages etc but keeping everything else constant)
ARM bigLITTLE exists to address different efficiencies that are exploited in different runtime states. Is big better than LITTLE? Sometimes yes, sometimes no.
If there is no definitive answer within the heterogenous cores of a single ARM implementation, then how can it be compared to RISC-V?
For the same sized single-core chip (x mm squared), running at the same voltage and same clock speed, on the same manufacturing process node, is there a (significant) difference between ARM and Risk-V?
(I'm assuming that core size, voltages and frequencies are the biggest differences between the big and LITTLE cores. And yes of course this is a funky theoretical question so a theoretical answer is perfectly fine :)
> For the same sized single-core chip (x mm squared), running at the same voltage and same clock speed, on the same manufacturing process node, is there a (significant) difference between ARM and Risk-V?
Very many. And they are at the CPU implementation level.
The instruction decoding buffer depth, the register file size, the implementation of the out of order execution, the TLB depth, the data bus width, separate hardware assist engines etc are amongst many other conscious and decisive design decisions that can differentiate separate designs. Even at the same (citing verbatim) «voltage and same clock speed, on the same manufacturing process node» the performance can vary wildy.
The M1 CPU family is a very wide implementation in nearly every aspect, with a very large L1 cache (both, I and D, caches), reasonably large L2 cache, a (reportedly) 380 register wide register file, 512-bit wide data bus (in the M1 Max) plus extras, hence why it outperforms competing ARM64 designs running at similar voltages and frequencies. The same is true for POWER CPU's (i.e. compare POWER9 vs POWER10 designs) – POWER10 is 2.6x faster than POWER9 despite running at similar frequencies – due to a substantial design overhaul.
Holistic system design matters, not the ISA alone.
The answer (for now) appears to be no. Also consider that ARM will not stand still.
"According to SiFive, it is working on the design of a new processor that will be 50% more powerful, and that it will be able to surpass the Cortex-A78 of ARM."
Which is the problem often with these sort of discussion. ARM of what ( You didn't state its version ) ? RISC-V of what? The ISA in itself? Or the actual implementation in itself. If it is implementation, which implementation? And by difference, what sort of difference, what kind of performance are you specifically looking at? Or you just want a GB5 result? ( One could argue there are compiler differences in GB5 results )
The only undisputed truth would be RISC-V at its bare minimum has smaller instruction than any ARM variation currently on the market. But then its competitor should have been something like Arc, and not ARM.
"About like ARM but without licensing fees and not controlled by ARM (the company)" could easily be a sufficient differentiator, especially if ARM the company starts acting out.
