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We use kicad for the design of a 28 layer PCB that includes a number of high speed (>10Gbps) impedance controlled lanes, including 25Gbps signal lines, and implementing three DDR4 banks, with a varying number of discrete chips, and breaking out from a large pin BGA, using a number of HDI features (blind/buried vias, etc).

We've been closely tracking the releases, and, at this point, our layout tech prefers using Kicad over another (proprietary) tool for the majority of layouts - so much so that's she's pushing for us to port all our designs to it.



Curious how long did that take and what iteration made it to production? What CAD was used for prior designs? Can you give an example of a "minority layout" that your tech deemed unfavorable?

I really want to believe KiCAD is there...but when billable labor rates are $150+/hr, and a single iteration of that complexity can easily burn US$10k+/ea in one-off prototype quantities + 4-6 month slip for manufacturing, assembly, reintegration, and verification testing, all of a sudden (free == cost-effective ?) becomes a very real risk consideration...never mind that I've yet to engage a customer that was willing to subsidize my development budget based on technical decision to assume a tool risk because it makes the cost of doing business marginally cheaper for me.


Open source tooling is not about saving the cost of a software license.

Open source tooling is about having indefinite access to your entire tool chain, including the ability to fix or modify it.


One shouldn't lay all of those costs on a tool just because a design needs an iteration to be correct. That happens even with expensive tools. The only question is weather there are any hindrances to doing the design as best as the humans know how.


What do you use for calculation of signal propagation delay and parasitics when you do layout in KiCAD?


That is stack up dependant - we work the board house on that, depending on geometery and material. Once they give us a ballpark, we will adjust our widths and clearances to something reasonable, recognizing that fab will adjust the traces and arcs to whatever spec we subsequently need.




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