We've already seen disruptive architectures like Google's Tensor Processing Units. x86 has already been upended for ML, and photonics based processing units will simply be another PCI card you plug into your computer just like a GPU.
If you design your network on a TPU, you will tend to use operators that work well on a TPU. And in the end you will have a network that works best on the TPU.
Lather rinse repeat for any other architecture. You can even make a network that runs best on Graphcore that way, but it won't be fun to do it. You might even get Graphcore to pay top dollar for it though as they both need some good publicity and they have lots of VC left to squander.
This also tends to be true of video games where the platform on which they were developed is the best place to play them rather than their many ports.
We’ve been doing this for years with DSP and networking. So kind of ho-hum from a HW perspective.
If you ask me the thing that makes these things even remotely interesting is the willingness from the SW side to support new HW architectures. Without that you can’t have any innovation in HW.
