> It's not clear to me that's as true any more, when, randomly for instance, HEVC is in chips, or iPhones include an ASIC that's actually an FPGA.
Ignoring that it would be pretty wild if I could actually throw Verilog (Yuck) at my phone, I would draw the line at roughly the OS kernel or at least it's rough outline. The OEM wouldn't be allowed to include any time bombs under that layer, but ultimately the focus is on "day to day" work rather than complete control of the hardware.
Ignoring that it would be pretty wild if I could actually throw Verilog (Yuck) at my phone, I would draw the line at roughly the OS kernel or at least it's rough outline. The OEM wouldn't be allowed to include any time bombs under that layer, but ultimately the focus is on "day to day" work rather than complete control of the hardware.