The 360/91, still in the punched card days, had a 60 ns cycle time. So that is
60 x 10^(-9)
seconds per cycle or
(1/60) x 10^(9)
Hz or 17 MHz. Not so shabby!
It read memory 64 bits at a time interleaved 64 ways. And it had IRCC 8 locations of 64 bits each of an instruction cache. Some loops could fit in the cache at which time the machine would go into loop mode.
60 x 10^(-9)
seconds per cycle or
(1/60) x 10^(9)
Hz or 17 MHz. Not so shabby!
It read memory 64 bits at a time interleaved 64 ways. And it had IRCC 8 locations of 64 bits each of an instruction cache. Some loops could fit in the cache at which time the machine would go into loop mode.