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Many arm chips support both a RISC ISA (the original ARM), and a more CISC-y ISA (thumb2). They consume less power and perform better with the latter. So well, in fact, that some chips don't even bother with the legacy RISC mode.



Thumb and Thumb2 really aren't any more 'CISC'-y then ARM; about the most cisc aspect would be that thumb2 supports two different instruction lengths (2 and 4 byte) whereas ARM supports only 4 byte instructions.

That said i've heard/read that Thumb2 tends to be the optimum size/space trade-off, but that's not because it's somehow more 'cisc'.


legacy RISC mode? last time I checked it was called the ARM mode, which is the absolute standard.

Thumb has benefits, but there are also limitations which is why I wouldn't call it a replacement.


Not anymore - Thumb2 is the new standard and supports everything that ARM does (at least, the last I read it did).

One of the big differences is that you now need a marker instruction for predicated sequences, but obviously the encoding is quite different.




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