The representation they suggest sounds a lot like a dithered PDM[1] bitstream. There is a slight difference because PDM is usually representing a continuously varying value.
Sigma-delta ADC converters internally generate something like this from the analog signal (though they often use more than one bit) and then sum the values over a window to get the actual value that they output.
[edit]
This actually makes me wonder if you could get decent power savings with 2-bit add/multipliers and streams of 2-bit values; that would significantly decrease the stream-length required for more precise calculations.
Sigma-delta ADC converters internally generate something like this from the analog signal (though they often use more than one bit) and then sum the values over a window to get the actual value that they output.
[edit]
This actually makes me wonder if you could get decent power savings with 2-bit add/multipliers and streams of 2-bit values; that would significantly decrease the stream-length required for more precise calculations.
1: https://en.wikipedia.org/wiki/Pulse-density_modulation