That's a fair point, but let me note that it is still less desirable (to an attacker) than the TSC in at least one case: when system load is high enough that there are other non-attacker-controlled threads running on the same core. When the counter thread's not running, the counter thread's not counting, and this loss of accuracy could at least in theory complicate an attack.
>>this loss of accuracy could at least in theory complicate an attack.
It just takes more samples and in the end it solves nothing.
>>non-attacker-controlled threads running on the same core.
Again it might take more samples. However, worse: the system is like unresponsive at the time. Also the timeslices are long enough to carry the task, unless there are way, way too many and unpredictable context switches (which would be bad for performance).
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Back in the days of old there were no built-in timers and people used to count cpu cycles to accommodate for external io.
