FPGA's are extremely powerful, but the toolchain is absolute dog shit. Xilinx, shame on you. Intel, will you change anything here?
The compound problem of this in reality is that finding the right people who have the right strain of semi-insanity to do this really well, is very slim. And most of them are tied up with a massive salary from some aerospace company such as Raytheon, GE, Honeywell, or someone like Philips (building medical devices).
Add to that compile times of an hour or a day, and you have a glacial development cycle on your hands.
HFT also still pays top dollar for competent FPGA developers. I'd wager they're willing to pay more than the listed industries too, especially if you factor in profit sharing and bonus structures.
1. The optimization problems that EDA tools have to solve are about as hard as it gets - NP-hard and sigma 2p problems at a massive scale. I'd argue that these are among the hardest optimization problems in modern computer science today.
2. The number of people with the CS + EE training to develop this software is decreasing. Not a lot of people are getting PhDs in EDA anymore, because:
3. Regular software houses (Google, Amazon, etc.) have about 2-3x the comp as EDA companies. Trust me I've seen a lot of incredibly smart EDA people jump to Google and more than double their salary overnight.
I doubt Intel is going to shift the balance here. It's not easy to develop a fast and efficient SP&R flow.
You know, we would all like faster synthesize and P&R cycles, but when people complain about the tooling being shit, that's not what they're complaining about. (Mostly)
The compound problem of this in reality is that finding the right people who have the right strain of semi-insanity to do this really well, is very slim. And most of them are tied up with a massive salary from some aerospace company such as Raytheon, GE, Honeywell, or someone like Philips (building medical devices).
Add to that compile times of an hour or a day, and you have a glacial development cycle on your hands.