k. Interesting. A former employer of mine used CASE 4. The FPGA was connected to the CPU via a memory interface. In general this option should be more flexible. You can choose the exact processor and FPGA type you want. On the other hand CASE 3 may has components which are optimized for each other. But for an industry product I would feel to be in a better position in CASE 4 if one of the components is discontinued.
About the complaint. It was a bit too emotional, because I had some specific issues in mind, that cost me a couple of forum searches and hours. Included GUI bugs, some none-intuitive settings and IP blackboxes that weren't working or buggy. Not only Altera but also Lattice. The Lattice FPGA contained a Hard-IP SPI. Didn't do anything. I posted on the forums, a couple of users replied who had the same problem but no reaction from Lattice at all.
k. Interesting. A former employer of mine used CASE 4. The FPGA was connected to the CPU via a memory interface. In general this option should be more flexible. You can choose the exact processor and FPGA type you want. On the other hand CASE 3 may has components which are optimized for each other. But for an industry product I would feel to be in a better position in CASE 4 if one of the components is discontinued.
About the complaint. It was a bit too emotional, because I had some specific issues in mind, that cost me a couple of forum searches and hours. Included GUI bugs, some none-intuitive settings and IP blackboxes that weren't working or buggy. Not only Altera but also Lattice. The Lattice FPGA contained a Hard-IP SPI. Didn't do anything. I posted on the forums, a couple of users replied who had the same problem but no reaction from Lattice at all.