By what I've been told, VLIW makes only really sense in some use cases such as D...

legulere on Jan 10, 2016 | parent | context | favorite | on: Why I will be using RISC-V in my next chip

By what I've been told, VLIW makes only really sense in some use cases such as DSP processors. With general purpose computing it happens way too often that you can't find enough instructions that are independent of each other. For the case where it is possible to execute instructions in parallel, you can make your CPU superscalar. The simple nature of the RISC-V ISA probably should make supercalarability easy and performant.

zhemao on Jan 10, 2016 [–]

We already have a RISC-V superscalar out-of-order core, the Berkeley Out-of-Order Machine (BOOM).

https://github.com/ucb-bar/riscv-boom