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| | Introduction to MicroScaling (MX) for AI Tensors (fpga.org) | |
4 points by buildbot on Dec 5, 2023 | past
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| | Introduction to Microscaling Formats (MX) Data (fpga.org) | |
3 points by matt_d on Nov 28, 2023 | past
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| | The First Kilocore RISC-V RV64I with High Bandwidth Memory (fpga.org) | |
1 point by ingve on Sept 7, 2019 | past
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| | 2GRVI Phalanx at Hot Chips 31 (2019): The First Kilocore RISC-V RV64I with HBM2 (fpga.org) | |
1 point by matt_d on Aug 19, 2019 | past
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| | Xilinx Project Everest: Everest: A New Adaptive Compute Acceleration Stack (fpga.org) | |
4 points by walterbell on Oct 12, 2018 | past
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| | Intel's 10nm Process Node, a 2.7x transistor density improvement (fpga.org) | |
2 points by virtuallynathan on March 31, 2017 | past
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| | Intel’s New 10 Nm Process: The Wind in Our Sails (fpga.org) | |
1 point by walterbell on March 30, 2017 | past
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| | GRVI Phalanx joins The Kilocore Club (fpga.org) | |
71 points by geolqued on Jan 21, 2017 | past | 21 comments
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| | RISC-V at Scale: GRVI Phalanx Joins the Kilocore Club (fpga.org) | |
4 points by samlittlewood on Jan 13, 2017 | past
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| | GRVI Phalanx Joins the Kilocore Club: RISC-V Scales Up (fpga.org) | |
3 points by BuuQu9hu on Jan 12, 2017 | past
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| | ‘Computing on Programmable Logic’ at Microsoft Research Faculty Summit 2016 (fpga.org) | |
4 points by ashitlerferad on July 16, 2016 | past
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| | GRVI Phalanx FPGA Update (fpga.org) | |
2 points by ashitlerferad on May 4, 2016 | past
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