I thought Cortex A8 was TI's implementation of ARMv7 and Snapdragon Qualcomm's: the ISAs are the same but Snapdragon can run distinct cores at distinct speeds because of disjoint caches per core, beneficial for power savings, for example.

Check http://www.arm.com/miscPDFs/14128.pdf

for more details than are simple to read.

No, the Cortex A8 hard macro was designed with TI as a lead customer, but is an ARM design.