Thank you for the feedback! This is a great idea and definitely fits into the vision.
Do you know if the FPGA and/or hardware communities use any type of formalism for design or documentation of state machines? One example of what I mean is is Harel statecharts - essentially a formalized type of nested state diagram.
Do you know if the FPGA and/or hardware communities use any type of formalism for design or documentation of state machines? One example of what I mean is is Harel statecharts - essentially a formalized type of nested state diagram.